1. Technical Field
The embodiments described herein relate to a phase change memory device, and more particularly, to a phase change memory device in which the effect of increasing the height of a bottom electrode contact is accomplished to minimize the reset current of the phase change memory device and a method for manufacturing the same.
2. Related Art
A conventional phase change memory device is a memory device that writes and reads information through the phase change of a phase change material, which has high resistance in an amorphous state and a low resistance in a crystalline state. A phase change memory device has advantages in that it has a rapid operation speed and a high level of integration when compared to a flash memory device.
In a conventional phase change memory device, the reversible phase change of the phase change material occurs by Joule heating that is produced by externally applied electric pulses. The procedures for controlling the phase of the phase change material are called set and reset procedures. In the reset procedure, after locally heating and melting the phase change material in the crystalline state to a temperature above a melting point by applying short and high pulses, the phase of the phase change material is changed to the amorphous state using a quenching phenomenon due to a great temperature difference from the surrounding environment. On the other hand, in the set procedure, by applying relatively long and low pulses, the phase change material in the amorphous state is changed to the crystalline state.
The amount of current produced in the set and reset procedures of a conventional phase change memory device determines the lifetime, the sensing margin and the shrinkage rate of the phase change memory device. Therefore, in order to ensure the reliable operation of the phase change material using a low reset current level, the methods of decreasing the contact area between a bottom electrode contact (BEC) and the phase change material or increasing the resistance of the BEC through increasing the height of the BEC have been considered.
Currently, as a way of decreasing the contact area between the BEC and the phase change material so as to minimize the reset current, a method of forming a BEC into the shape of a cylinder has been disclosed. This method will be described below with reference to FIGS. 1 and 2.
FIG. 1 is a sectional view illustrating a conventional phase change memory device, and FIG. 2 is a plan view illustrating the BEC shown in FIG. 1.
Referring to FIG. 1, an insulation layer 16 is formed on bottom electrodes 12. After defining BEC holes to have a circular transverse sectional shape by patterning the insulation layer 16, a conductive material 18 is applied onto the resultant entire structure. Thereupon, by etching the conductive material 18 such that the conductive material 18 remains only on the sidewalls of the BEC holes, the surfaces of the bottom electrodes are exposed. Then, by filling the BEC holes with a dielectric material 20, BECs 21 are formed. Next, a phase change material layer 22 and top electrodes 24 are sequentially formed on the BECs 21. In FIG. 1, the unexplained numeral 14 designates an interlayer dielectric.
FIG. 2 is a plan view illustrating a state in which the conductive material 18 and the dielectric material 20 are filled in the BEC holes after defining the BEC holes to have the circular transverse sectional shape by patterning the insulation layer 16. As shown in FIG. 2, each BEC 21 may be composed of the dielectric material 20 which has the shape of a circular column and the conductive material 18 which has the shape of a ring surrounding the circumferential outer surface of the dielectric material 20.
As described above, by forming the BEC 21 to have the shape of a cylinder and filling the inside of the BEC 21 with the dielectric material 20, the contact area between the BEC 21 and the phase change material layer 22 can be minimized and according to this, the reset current can be decreased.
However, limitations necessarily exist in decreasing the reset current only by reducing the contact area between the BEC 21 and the phase change material layer 22. In this regard, if the height of the BEC 21 can be increased while minimizing the contact area between the BEC 21 and the phase change material layer 22, the reset current can be more effectively decreased.
Since the height of the BEC 21 is determined by the definition of a process, the height of the BEC 21 varies depending upon a lithography process and an etching process for defining the BEC holes. However, in the current semiconductor manufacturing technologies, when considering the sectional area of the bottom electrode 12 and the thickness of the insulation layer 16, the height of the BEC 21 cannot be properly controlled less than the aspect ratio of 1.2. Therefore, limitations also necessarily exist in decreasing the reset current of the phase change memory device through controlling the height of the BEC 21, and therefore, a limit is imposed on the shrinkage margin of the phase change memory device.